Computer operating systems use virtual memory techniques to permit application programs to address a contiguous working memory space, even when the corresponding physical (machine) memory space is fragmented and may overflow to disk storage. The virtual memory address space is typically divided into pages, and the computer memory management unit (MMU) uses page tables to translate the virtual addresses of the application program into physical addresses. The virtual address range may exceed the amount of actual physical memory, in which case disk files are used to save virtual memory pages that are not currently active. When an application attempts to access a virtual address that is absent from the physical memory, the MMU raises a page fault exception (commonly referred to simply as a “page fault”), which causes the operating system to swap the required page back from the disk into the memory.
I/O devices usually use physical memory addresses in order to access host memory, but some virtual memory addressing techniques for I/O have been described in the patent literature. For example, U.S. Pat. No. 6,321,276, whose disclosure is incorporated herein by reference, describes methods and systems for processing input/output requests including virtual memory addresses. A “recoverable I/O request processor” translates virtual memory addresses to physical memory addresses utilizing translation tables local to an I/O device. If a local translation fails, the I/O request processor requests virtual address mapping information from the operating system.
U.S. Patent Application Publication 2004/0221128, whose disclosure is incorporated herein by reference, describes virtual-to-physical memory mapping in network interfaces. A plurality of processing nodes in a network have respective addressable memories and respective network interfaces. Each network interface includes a memory management unit with at least one mapping table for mapping virtual addresses to the physical addresses of the addressable memory of the respective processing node.
U.S. Pat. No. 7,299,266, whose disclosure is incorporated herein by reference, describes memory management offload for RDMA (remote direct memory access) enabled network adapters. A mechanism is provided for implicitly or explicitly registering memory regions that are written to and from by an Internet Protocol Suite Offload Engine (IPSOE). The hardware is allowed to directly use a region through memory region tables and address translation tables while keeping the region isolated from use by other applications.
InfiniBand™ (IB) is a switched-fabric communications link primarily used in high-performance computing. It has been standardized by the InfiniBand Trade Association. Computing devices (host processors and peripherals) connect to the IB fabric via a network interface adapter, which is referred to in IB parlance as a channel adapter. Host processors (or hosts) use a host channel adapter (HCA), while peripheral devices use a target channel adapter (TCA). IB channel adapters implement various service types and transport protocols, including RDMA read and write operations. Details of a hardware-based implementation of IB RDMA are provided, for example, in U.S. Patent Application Publication 2002/0152327, whose disclosure is incorporated herein by reference.